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| author | Claire Wolf <clifford@clifford.at> | 2020-05-07 18:11:48 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-05-07 18:11:48 +0200 |
| commit | 06104249406972de01d0360df63a32cafcdf2ec5 (patch) | |
| tree | 22b352c1ebf2289e7cc61561d233501762742580 /techlibs/intel_alm/synth_intel_alm.cc | |
| parent | 3a985d82851e498ba768d46403c41c05e5897eb4 (diff) | |
| parent | 885deb4e88e847e1314b8a67087f72c3809a6995 (diff) | |
| download | yosys-06104249406972de01d0360df63a32cafcdf2ec5.tar.gz yosys-06104249406972de01d0360df63a32cafcdf2ec5.tar.bz2 yosys-06104249406972de01d0360df63a32cafcdf2ec5.zip | |
Merge pull request #2005 from YosysHQ/claire/fix1990
Add "nowrshmsk" attribute, fix shift-and-mask bit slice write for signed offset
Diffstat (limited to 'techlibs/intel_alm/synth_intel_alm.cc')
0 files changed, 0 insertions, 0 deletions