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| author | Patrick Urban <patrick.urban@web.de> | 2021-09-24 21:50:26 +0200 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2021-11-13 21:53:25 +0100 |
| commit | acb993b27b7027112bf10796efbf2886815f8630 (patch) | |
| tree | 6dbc12ce01fc730770eedfbff7131374b299b5cc /techlibs/intel/max10/cells_map.v | |
| parent | 0a72952d5f259a23f9d1122d936d3d4d60ce224d (diff) | |
| download | yosys-acb993b27b7027112bf10796efbf2886815f8630.tar.gz yosys-acb993b27b7027112bf10796efbf2886815f8630.tar.bz2 yosys-acb993b27b7027112bf10796efbf2886815f8630.zip | |
Allow initial blocks to be disabled during tests
Wrap initial blocks with a NO_INIT so that tests for archs without register initialization feature don't fail.
Diffstat (limited to 'techlibs/intel/max10/cells_map.v')
0 files changed, 0 insertions, 0 deletions