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author | Benedikt Tutzer <benedikt.tutzer@tuwien.ac.at> | 2019-03-28 12:16:39 +0100 |
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committer | Benedikt Tutzer <benedikt.tutzer@tuwien.ac.at> | 2019-03-28 12:16:39 +0100 |
commit | 03d1606b42110f8eac7311ac57c7334d1f781273 (patch) | |
tree | 9fc490a93fbb75ac3e23b276a151e22ca1a3b84e /techlibs/intel/cyclonev | |
parent | b9288b216dce110ad11eb0615a6a911a9fcae05b (diff) | |
parent | 32bd0f22ec93202e67395901cdc64c20df7f0da7 (diff) | |
download | yosys-03d1606b42110f8eac7311ac57c7334d1f781273.tar.gz yosys-03d1606b42110f8eac7311ac57c7334d1f781273.tar.bz2 yosys-03d1606b42110f8eac7311ac57c7334d1f781273.zip |
Merge remote-tracking branch 'origin/master' into feature/python_bindings
Diffstat (limited to 'techlibs/intel/cyclonev')
-rw-r--r-- | techlibs/intel/cyclonev/cells_map.v | 4 | ||||
-rw-r--r-- | techlibs/intel/cyclonev/cells_sim.v | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/techlibs/intel/cyclonev/cells_map.v b/techlibs/intel/cyclonev/cells_map.v index bd60d4e17..f8d142bc9 100644 --- a/techlibs/intel/cyclonev/cells_map.v +++ b/techlibs/intel/cyclonev/cells_map.v @@ -76,7 +76,7 @@ module \$lut (A, Y); wire VCC; wire GND; assign {VCC,GND} = {1'b1,1'b0}; - + generate if (WIDTH == 1) begin assign Y = ~A[0]; // Not need to spend 1 logic cell for such an easy function @@ -151,7 +151,7 @@ module \$lut (A, Y); TODO: There's not a just 7-input function on Cyclone V, see the following note: **Extended LUT Mode** Use extended LUT mode to implement a specific set of 7-input functions. The set must - be a 2-to-1 multiplexer fed by two arbitrary 5-input functions sharing four inputs. + be a 2-to-1 multiplexer fed by two arbitrary 5-input functions sharing four inputs. [source](Device Interfaces and Integration Basics for Cyclone V Devices). end*/ else diff --git a/techlibs/intel/cyclonev/cells_sim.v b/techlibs/intel/cyclonev/cells_sim.v index 5ecdabcfc..fa27c2c8e 100644 --- a/techlibs/intel/cyclonev/cells_sim.v +++ b/techlibs/intel/cyclonev/cells_sim.v @@ -54,7 +54,7 @@ module cyclonev_lcell_comb // Internal variables // Sub mask for fragmented LUTs wire [15:0] mask_a, mask_b, mask_c, mask_d; - // Independant output for fragmented LUTs + // Independent output for fragmented LUTs wire output_0, output_1, output_2, output_3; // Extended mode uses mux to define the output wire mux_0, mux_1; |