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| author | whitequark <whitequark@whitequark.org> | 2020-12-22 06:46:44 +0000 |
|---|---|---|
| committer | whitequark <whitequark@whitequark.org> | 2020-12-22 06:51:38 +0000 |
| commit | f14074d2c2c8fa0ad4f6922e07c050c912cbfd19 (patch) | |
| tree | 733e3bf39d3e83b16b35c6a5e1a7f3b4e0a15ce8 /techlibs/intel/cycloneive | |
| parent | 2b62b5ef34044ad4dfc8b04713688c78ea541f7c (diff) | |
| download | yosys-f14074d2c2c8fa0ad4f6922e07c050c912cbfd19.tar.gz yosys-f14074d2c2c8fa0ad4f6922e07c050c912cbfd19.tar.bz2 yosys-f14074d2c2c8fa0ad4f6922e07c050c912cbfd19.zip | |
cxxrtl: don't crash generating debug information for unused wires.
Diffstat (limited to 'techlibs/intel/cycloneive')
0 files changed, 0 insertions, 0 deletions