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| author | Eddie Hung <eddie@fpgeh.com> | 2019-06-18 09:49:57 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-18 09:49:57 -0700 |
| commit | da3d2eedd2b6391621e81b3eaaa28a571e058f9d (patch) | |
| tree | eeb2fb177e7f207a0b87b88c5af2348b151c128a /techlibs/intel/cycloneive/arith_map.v | |
| parent | 608a95eb01ec5c54d09102917e224ff5e0c39d47 (diff) | |
| download | yosys-da3d2eedd2b6391621e81b3eaaa28a571e058f9d.tar.gz yosys-da3d2eedd2b6391621e81b3eaaa28a571e058f9d.tar.bz2 yosys-da3d2eedd2b6391621e81b3eaaa28a571e058f9d.zip | |
Fix (do not) permute LUT inputs, but permute mux selects
Diffstat (limited to 'techlibs/intel/cycloneive/arith_map.v')
0 files changed, 0 insertions, 0 deletions