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| author | Eddie Hung <eddieh@ece.ubc.ca> | 2019-03-14 08:10:02 -0700 |
|---|---|---|
| committer | Eddie Hung <eddieh@ece.ubc.ca> | 2019-03-14 08:10:02 -0700 |
| commit | 26ecbc1aee1dca1c186ab2b51835d74f67bc3e75 (patch) | |
| tree | b9cc84592ebccaec275b5f3279f76297ef294e64 /techlibs/intel/common | |
| parent | 79b4a275ce85d231186105b6e73a596ff3326e1f (diff) | |
| download | yosys-26ecbc1aee1dca1c186ab2b51835d74f67bc3e75.tar.gz yosys-26ecbc1aee1dca1c186ab2b51835d74f67bc3e75.tar.bz2 yosys-26ecbc1aee1dca1c186ab2b51835d74f67bc3e75.zip | |
Add shregmap -init_msb_first and use in synth_xilinx
Diffstat (limited to 'techlibs/intel/common')
0 files changed, 0 insertions, 0 deletions