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| author | Dan Ravensloft <dan.ravensloft@gmail.com> | 2019-12-10 13:31:45 +0000 |
|---|---|---|
| committer | Dan Ravensloft <dan.ravensloft@gmail.com> | 2019-12-10 13:47:58 +0000 |
| commit | eab3272cdeed697bdb9664c2d8a133d336addb7c (patch) | |
| tree | 834d258a4f548a00abd36af9486b5e4c79850f85 /techlibs/intel/Makefile.inc | |
| parent | fcce94010f3282e7f7d3f602b3e710cb7ce524ee (diff) | |
| download | yosys-eab3272cdeed697bdb9664c2d8a133d336addb7c.tar.gz yosys-eab3272cdeed697bdb9664c2d8a133d336addb7c.tar.bz2 yosys-eab3272cdeed697bdb9664c2d8a133d336addb7c.zip | |
synth_intel: cyclone10 -> cyclone10lp
Diffstat (limited to 'techlibs/intel/Makefile.inc')
| -rw-r--r-- | techlibs/intel/Makefile.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/intel/Makefile.inc b/techlibs/intel/Makefile.inc index 4e8f423c8..92a83b5af 100644 --- a/techlibs/intel/Makefile.inc +++ b/techlibs/intel/Makefile.inc @@ -7,7 +7,7 @@ $(eval $(call add_share_file,share/intel/common,techlibs/intel/common/brams_m9k. $(eval $(call add_share_file,share/intel/common,techlibs/intel/common/brams_map_m9k.v)) # Add the cell models and mappings for the VQM backend -families := max10 a10gx cyclonev cyclone10 cycloneiv cycloneive +families := max10 a10gx cyclonev cyclone10lp cycloneiv cycloneive $(foreach family,$(families), $(eval $(call add_share_file,share/intel/$(family),techlibs/intel/$(family)/cells_sim.v))) $(foreach family,$(families), $(eval $(call add_share_file,share/intel/$(family),techlibs/intel/$(family)/cells_map.v))) #$(eval $(call add_share_file,share/intel/cycloneive,techlibs/intel/cycloneive/arith_map.v)) |