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| author | Clifford Wolf <clifford@clifford.at> | 2015-08-13 09:52:06 +0200 |
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| committer | Clifford Wolf <clifford@clifford.at> | 2015-08-13 09:52:06 +0200 |
| commit | 80910d13a610886f4430fbd991ada78b2e586ada (patch) | |
| tree | c582d1b1394600030c8bd88a8ec4a3b25178fa1f /techlibs/ice40/cells_sim.v | |
| parent | c699d7c6145f978b1864c2be25d9f0607099a3e5 (diff) | |
| parent | 698357dd9a17365566f4db2662e9ce9fea7594c4 (diff) | |
| download | yosys-80910d13a610886f4430fbd991ada78b2e586ada.tar.gz yosys-80910d13a610886f4430fbd991ada78b2e586ada.tar.bz2 yosys-80910d13a610886f4430fbd991ada78b2e586ada.zip | |
Merge branch 'master' of github.com:cliffordwolf/yosys
Diffstat (limited to 'techlibs/ice40/cells_sim.v')
| -rw-r--r-- | techlibs/ice40/cells_sim.v | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/techlibs/ice40/cells_sim.v b/techlibs/ice40/cells_sim.v index ed7c7cd2d..17b6be9ce 100644 --- a/techlibs/ice40/cells_sim.v +++ b/techlibs/ice40/cells_sim.v @@ -866,8 +866,7 @@ endmodule // SiliconBlue Device Configuration Cells -(* blackbox *) -(* keep *) +(* blackbox, keep *) module SB_WARMBOOT ( input BOOT, input S1, |