diff options
author | Eddie Hung <eddie@fpgeh.com> | 2019-04-17 12:15:34 -0700 |
---|---|---|
committer | Eddie Hung <eddie@fpgeh.com> | 2019-04-17 12:15:34 -0700 |
commit | 42c33db22caeffa05bde59d915a4433b756929a1 (patch) | |
tree | 379cc6d004d6feae33763ce15e40b6b3233d6da0 /techlibs/ice40/abc.v | |
parent | c1ebe51a75ef8ce47d6b1406fa87b15bd8f97760 (diff) | |
download | yosys-42c33db22caeffa05bde59d915a4433b756929a1.tar.gz yosys-42c33db22caeffa05bde59d915a4433b756929a1.tar.bz2 yosys-42c33db22caeffa05bde59d915a4433b756929a1.zip |
Rename to abc.*
Diffstat (limited to 'techlibs/ice40/abc.v')
-rw-r--r-- | techlibs/ice40/abc.v | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/techlibs/ice40/abc.v b/techlibs/ice40/abc.v new file mode 100644 index 000000000..e2a54a42c --- /dev/null +++ b/techlibs/ice40/abc.v @@ -0,0 +1,12 @@ +(* abc_box_id = 1 *) +module SB_CARRY (output CO, input CI, I0, I1); + assign CO = (I0 && I1) || ((I0 || I1) && CI); +endmodule + +(* abc_box_id = 2 *) +module SB_LUT4 (output O, input I0, I1, I2, I3); + parameter [15:0] LUT_INIT = 0; + // Indicate this is a black-box + assign O = 1'b0; +endmodule + |