Renamed GreenPAK4 cells, improved GP4 DFF mapping

5 files changed, 50 insertions, 9 deletions

diff --git a/techlibs/greenpak4/Makefile.inc b/techlibs/greenpak4/Makefile.inc
index 39e385d1b..5808e7bdf 100644
--- a/techlibs/greenpak4/Makefile.inc
+++ b/techlibs/greenpak4/Makefile.inc
@@ -3,3 +3,4 @@ OBJS += techlibs/greenpak4/synth_greenpak4.o
 
 $(eval $(call add_share_file,share/greenpak4,techlibs/greenpak4/cells_map.v))
 $(eval $(call add_share_file,share/greenpak4,techlibs/greenpak4/cells_sim.v))
+$(eval $(call add_share_file,share/greenpak4,techlibs/greenpak4/gp_dff.lib))
diff --git a/techlibs/greenpak4/cells_map.v b/techlibs/greenpak4/cells_map.v
index 976687434..667d853da 100644
--- a/techlibs/greenpak4/cells_map.v
+++ b/techlibs/greenpak4/cells_map.v
@@ -1,5 +1,5 @@
 module  \$_DFF_P_ (input D, C, output Q);
-	DFF _TECHMAP_REPLACE_ (
+	GP_DFF _TECHMAP_REPLACE_ (
 		.D(D),
 		.Q(Q),
 		.CLK(C),
@@ -8,6 +8,16 @@ module  \$_DFF_P_ (input D, C, output Q);
 	);
 endmodule
 
+module  \$_DFFSR_PNN_ (input C, S, R, D, output Q);
+	GP_DFF _TECHMAP_REPLACE_ (
+		.D(D),
+		.Q(Q),
+		.CLK(C),
+		.nRSTZ(R),
+		.nSETZ(S)
+	);
+endmodule
+
 module \$lut (A, Y);
   parameter WIDTH = 0;
   parameter LUT = 0;
@@ -17,19 +27,19 @@ module \$lut (A, Y);
 
   generate
     if (WIDTH == 1) begin
-      LUT2 #(.INIT(LUT)) _TECHMAP_REPLACE_ (.OUT(Y),
+      GP_2LUT #(.INIT({2'b00, LUT})) _TECHMAP_REPLACE_ (.OUT(Y),
       	.IN0(A[0]), .IN1(1'b0));
     end else
     if (WIDTH == 2) begin
-      LUT2 #(.INIT(LUT)) _TECHMAP_REPLACE_ (.OUT(Y),
+      GP_2LUT #(.INIT(LUT)) _TECHMAP_REPLACE_ (.OUT(Y),
       	.IN0(A[0]), .IN1(A[1]));
     end else
     if (WIDTH == 3) begin
-      LUT3 #(.INIT(LUT)) _TECHMAP_REPLACE_ (.OUT(Y),
+      GP_3LUT #(.INIT(LUT)) _TECHMAP_REPLACE_ (.OUT(Y),
       	.IN0(A[0]), .IN1(A[1]), .IN2(A[2]));
     end else
     if (WIDTH == 4) begin
-      LUT4 #(.INIT(LUT)) _TECHMAP_REPLACE_ (.OUT(Y),
+      GP_4LUT #(.INIT(LUT)) _TECHMAP_REPLACE_ (.OUT(Y),
       	.IN0(A[0]), .IN1(A[1]), .IN2(A[2]), .IN3(A[3]));
     end else begin
       wire _TECHMAP_FAIL_ = 1;
diff --git a/techlibs/greenpak4/cells_sim.v b/techlibs/greenpak4/cells_sim.v
index 6bcbda8e5..d9ddaaccf 100644
--- a/techlibs/greenpak4/cells_sim.v
+++ b/techlibs/greenpak4/cells_sim.v
@@ -1,4 +1,4 @@
-module DFF(input D, CLK, nRSTZ, nSETZ, output reg Q);
+module GP_DFF(input D, CLK, nRSTZ, nSETZ, output reg Q);
 	always @(posedge CLK, negedge nRSTZ, negedge nSETZ) begin
 		if (!nRSTZ)
 			Q <= 1'b0;
@@ -9,17 +9,17 @@ module DFF(input D, CLK, nRSTZ, nSETZ, output reg Q);
 	end
 endmodule
 
-module LUT2(input IN0, IN1, output OUT);
+module GP_2LUT(input IN0, IN1, output OUT);
 	parameter [3:0] INIT = 0;
 	assign OUT = INIT[{IN1, IN0}];
 endmodule
 
-module LUT3(input IN0, IN1, IN2, output OUT);
+module GP_3LUT(input IN0, IN1, IN2, output OUT);
 	parameter [7:0] INIT = 0;
 	assign OUT = INIT[{IN2, IN1, IN0}];
 endmodule
 
-module LUT4(input IN0, IN1, IN2, IN3, output OUT);
+module GP_4LUT(input IN0, IN1, IN2, IN3, output OUT);
 	parameter [15:0] INIT = 0;
 	assign OUT = INIT[{IN3, IN2, IN1, IN0}];
 endmodule
diff --git a/techlibs/greenpak4/gp_dff.lib b/techlibs/greenpak4/gp_dff.lib
new file mode 100644
index 000000000..9e2e46cb4
--- /dev/null
+++ b/techlibs/greenpak4/gp_dff.lib
@@ -0,0 +1,26 @@
+library(gp_dff) {
+  cell(GP_DFF_NOSR) {
+    area: 1;
+    ff("IQ", "IQN") { clocked_on: CLK;
+                  next_state: D; }
+    pin(CLK) { direction: input;
+                 clock: true; }
+    pin(D) { direction: input; }
+    pin(Q) { direction: output;
+              function: "IQ"; }
+  }
+  cell(GP_DFF_SR) {
+    area: 1;
+    ff("IQ", "IQN") { clocked_on: CLK;
+                  next_state: D;
+                      preset: "nSETZ'";
+                       clear: "nRSTZ'"; }
+    pin(CLK) { direction: input;
+                 clock: true; }
+    pin(D) { direction: input; }
+    pin(Q) { direction: output;
+              function: "IQ"; }
+    pin(nRSTZ) { direction: input; }
+    pin(nSETZ) { direction: input; }
+  }
+}
diff --git a/techlibs/greenpak4/synth_greenpak4.cc b/techlibs/greenpak4/synth_greenpak4.cc
index 4de08eb82..8b88667c4 100644
--- a/techlibs/greenpak4/synth_greenpak4.cc
+++ b/techlibs/greenpak4/synth_greenpak4.cc
@@ -86,6 +86,8 @@ struct SynthGreenPAK4Pass : public Pass {
 		log("        memory_map\n");
 		log("        opt -undriven -fine\n");
 		log("        techmap\n");
+		log("        dfflibmap -prepare -liberty +/greenpak4/gp_dff.lib\n");
+		log("        opt -fast\n");
 		log("        abc -dff     (only if -retime)\n");
 		log("\n");
 		log("    map_luts:\n");
@@ -187,6 +189,8 @@ struct SynthGreenPAK4Pass : public Pass {
 			Pass::call(design, "memory_map");
 			Pass::call(design, "opt -undriven -fine");
 			Pass::call(design, "techmap");
+			Pass::call(design, "dfflibmap -prepare -liberty +/greenpak4/gp_dff.lib");
+			Pass::call(design, "opt -fast");
 			if (retime)
 				Pass::call(design, "abc -dff");
 		}