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| author | David Shah <dave@ds0.me> | 2018-11-09 15:18:30 +0000 |
|---|---|---|
| committer | David Shah <dave@ds0.me> | 2018-11-09 15:18:30 +0000 |
| commit | 960c8794fa0da7c0ea8b6bf39bf309425fab17b3 (patch) | |
| tree | 84617512096dcd4aff4b4ff013aab2978852ba7f /techlibs/ecp5 | |
| parent | 1f51332808b5dce76d74a64bd84e4e51c65f6998 (diff) | |
| download | yosys-960c8794fa0da7c0ea8b6bf39bf309425fab17b3.tar.gz yosys-960c8794fa0da7c0ea8b6bf39bf309425fab17b3.tar.bz2 yosys-960c8794fa0da7c0ea8b6bf39bf309425fab17b3.zip | |
ecp5: Add blackboxes for ancillary DCU cells
Signed-off-by: David Shah <dave@ds0.me>
Diffstat (limited to 'techlibs/ecp5')
| -rw-r--r-- | techlibs/ecp5/cells_bb.v | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/techlibs/ecp5/cells_bb.v b/techlibs/ecp5/cells_bb.v index 401b976d8..2585c14a9 100644 --- a/techlibs/ecp5/cells_bb.v +++ b/techlibs/ecp5/cells_bb.v @@ -483,3 +483,21 @@ module DCUA( parameter D_TX_VCO_CK_DIV = "0b000"; parameter D_XGE_MODE = "0b0"; endmodule + +(* blackbox *) +module EXTREFB ( + input REFCLKP, REFCLKN, + output REFCLKO +); + parameter REFCK_PWDNB = "0b0"; + parameter REFCK_RTERM = "0b0"; + parameter REFCK_DCBIAS_EN = "0b0"; +endmodule + +(* blackbox *) +module PCSCLKDIV ( + input CLKI, RST, SEL2, SEL1, SEL0, + output CDIV1, CDIVX +); + parameter GSR = "DISABLED"; +endmodule |