coolrunner2: Initial mapping of DFFs

All DFFs map to either FDCP (matches Xilinx) or a custom FDCP_N
(negative-edge triggered)

1 files changed, 31 insertions, 0 deletions

diff --git a/techlibs/coolrunner2/xc2_dff.lib b/techlibs/coolrunner2/xc2_dff.lib
new file mode 100644
index 000000000..b578493a1
--- /dev/null
+++ b/techlibs/coolrunner2/xc2_dff.lib
@@ -0,0 +1,31 @@
+library(xc2_dff) {
+  cell(FDCP) {
+    area: 1;
+    ff("IQ", "IQN") { clocked_on: C;
+                      next_state: D;
+                      clear: "CLR";
+                      preset: "PRE"; }
+    pin(C) { direction: input;
+             clock: true; }
+    pin(D) { direction: input; }
+    pin(Q) { direction: output;
+             function: "IQ"; }
+    pin(CLR) { direction: input; }
+    pin(PRE) { direction: input; }
+  }
+
+  cell(FDCP_N) {
+    area: 1;
+    ff("IQ", "IQN") { clocked_on: "!C";
+                      next_state: D;
+                      clear: "CLR";
+                      preset: "PRE"; }
+    pin(C) { direction: input;
+             clock: true; }
+    pin(D) { direction: input; }
+    pin(Q) { direction: output;
+             function: "IQ"; }
+    pin(CLR) { direction: input; }
+    pin(PRE) { direction: input; }
+  }
+}