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author | N. Engelhardt <nak@symbioticeda.com> | 2020-03-03 19:15:41 +0100 |
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committer | GitHub <noreply@github.com> | 2020-03-03 19:15:41 +0100 |
commit | 0ec971444b0ae226417ac36d408569374269e799 (patch) | |
tree | 144462b52f39c9d102db104ab98b87b49d91a0bb /techlibs/common/synth.cc | |
parent | d59da5a4e4d53813900fbd8327360bf8ef9bbd1d (diff) | |
parent | d7987fec1255c8d4ae8ad0b3e04e2172ac300604 (diff) | |
download | yosys-0ec971444b0ae226417ac36d408569374269e799.tar.gz yosys-0ec971444b0ae226417ac36d408569374269e799.tar.bz2 yosys-0ec971444b0ae226417ac36d408569374269e799.zip |
Merge pull request #1691 from ZirconiumX/use-flowmap-in-noabc
Add -flowmap option to `synth{,_ice40}`
Diffstat (limited to 'techlibs/common/synth.cc')
-rw-r--r-- | techlibs/common/synth.cc | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/techlibs/common/synth.cc b/techlibs/common/synth.cc index a176357a7..e7a192c07 100644 --- a/techlibs/common/synth.cc +++ b/techlibs/common/synth.cc @@ -78,6 +78,9 @@ struct SynthPass : public ScriptPass log(" -abc9\n"); log(" use new ABC9 flow (EXPERIMENTAL)\n"); log("\n"); + log(" -flowmap\n"); + log(" use FlowMap LUT techmapping instead of ABC\n"); + log("\n"); log("\n"); log("The following commands are executed by this synthesis command:\n"); help_script(); @@ -85,7 +88,7 @@ struct SynthPass : public ScriptPass } string top_module, fsm_opts, memory_opts, abc; - bool autotop, flatten, noalumacc, nofsm, noabc, noshare; + bool autotop, flatten, noalumacc, nofsm, noabc, noshare, flowmap; int lut; void clear_flags() YS_OVERRIDE @@ -101,6 +104,7 @@ struct SynthPass : public ScriptPass nofsm = false; noabc = false; noshare = false; + flowmap = false; abc = "abc"; } @@ -167,6 +171,10 @@ struct SynthPass : public ScriptPass abc = "abc9"; continue; } + if (args[argidx] == "-flowmap") { + flowmap = true; + continue; + } break; } extra_args(args, argidx, design); @@ -176,6 +184,8 @@ struct SynthPass : public ScriptPass if (abc == "abc9" && !lut) log_cmd_error("ABC9 flow only supported for FPGA synthesis (using '-lut' option)\n"); + if (flowmap && !lut) + log_cmd_error("FlowMap is only supported for FPGA synthesis (using '-lut' option)\n"); log_header(design, "Executing SYNTH pass.\n"); log_push(); @@ -240,15 +250,20 @@ struct SynthPass : public ScriptPass { run("techmap -map +/gate2lut.v", "(if -noabc and -lut)"); run("clean; opt_lut", " (if -noabc and -lut)"); + run("flowmap -maxlut K", " (if -flowmap and -lut)"); } else if (noabc && lut) { run(stringf("techmap -map +/gate2lut.v -D LUT_WIDTH=%d", lut)); run("clean; opt_lut"); } + else if (flowmap) + { + run(stringf("flowmap -maxlut %d", lut)); + } run("opt -fast"); - if (!noabc) { + if (!noabc && !flowmap) { #ifdef YOSYS_ENABLE_ABC if (help_mode) { |