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| author | David Shah <dave@ds0.me> | 2020-04-15 16:10:38 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-04-15 16:10:38 +0100 |
| commit | 7ad8b242806357599cfcbd228cef5c331935ef7c (patch) | |
| tree | aeec4fe4c00fd605c763de73051a7cc4b8ba47f5 /techlibs/common/simcells.v | |
| parent | 38a0c30d65584335fee3e17f9075711853638ac3 (diff) | |
| parent | 85672a6c1fd2d99cc1e5690ab978625e78ccc95d (diff) | |
| download | yosys-7ad8b242806357599cfcbd228cef5c331935ef7c.tar.gz yosys-7ad8b242806357599cfcbd228cef5c331935ef7c.tar.bz2 yosys-7ad8b242806357599cfcbd228cef5c331935ef7c.zip | |
Merge pull request #1897 from YosysHQ/dave/bram-rejection-fix
memory_bram: Fix ignorance of valid, matched rules
Diffstat (limited to 'techlibs/common/simcells.v')
0 files changed, 0 insertions, 0 deletions