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| author | Miodrag Milanovic <mmicko@gmail.com> | 2019-09-18 17:45:07 +0200 |
|---|---|---|
| committer | Miodrag Milanovic <mmicko@gmail.com> | 2019-09-18 17:45:07 +0200 |
| commit | 8badd4d812e30c79a3fe75694ef8d8289f08abc7 (patch) | |
| tree | 1f290e9521e2b031cc16eef8860c4aa23aa6f343 /techlibs/anlogic | |
| parent | 3487b95224d175d997e701430fca95d0cc51b269 (diff) | |
| download | yosys-8badd4d812e30c79a3fe75694ef8d8289f08abc7.tar.gz yosys-8badd4d812e30c79a3fe75694ef8d8289f08abc7.tar.bz2 yosys-8badd4d812e30c79a3fe75694ef8d8289f08abc7.zip | |
better handling of lut and begin/end add
Diffstat (limited to 'techlibs/anlogic')
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