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| author | Icenowy Zheng <icenowy@aosc.io> | 2018-12-19 09:36:53 +0800 |
|---|---|---|
| committer | Icenowy Zheng <icenowy@aosc.io> | 2018-12-19 09:36:53 +0800 |
| commit | c9513c695a76124ef1155343e3c058767c418051 (patch) | |
| tree | 795c0ec0481ef4fcd71b80c6b311032ed3fafbed /techlibs/anlogic/synth_anlogic.cc | |
| parent | 847fd360773d72933f1c728dba0755e0033350a6 (diff) | |
| download | yosys-c9513c695a76124ef1155343e3c058767c418051.tar.gz yosys-c9513c695a76124ef1155343e3c058767c418051.tar.bz2 yosys-c9513c695a76124ef1155343e3c058767c418051.zip | |
Anlogic: let LUT5/6 have more cost than LUT4-
According to the datasheet of Anlogic Eagle FPGAs, The LUTs natively
in an Anlogic FPGA is LUT4 (in MSLICEs) and "Enhanced LUT5" (in
LSLICEs). An "Enhanced LUT5" can be divided into two LUT4s.
So a LUT5 will cost around 2x resource of a LUT4, and a LUT6 will cost
2x resource of a LUT5.
Change the -lut parameter passed to the abc command to pass this cost
info to the ABC process.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Diffstat (limited to 'techlibs/anlogic/synth_anlogic.cc')
| -rw-r--r-- | techlibs/anlogic/synth_anlogic.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/anlogic/synth_anlogic.cc b/techlibs/anlogic/synth_anlogic.cc index a4eafeddf..9c44599ea 100644 --- a/techlibs/anlogic/synth_anlogic.cc +++ b/techlibs/anlogic/synth_anlogic.cc @@ -176,7 +176,7 @@ struct SynthAnlogicPass : public ScriptPass if (check_label("map_luts")) { - run("abc -lut 6"); + run("abc -lut 4:6"); run("clean"); } |