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| author | Eddie Hung <eddie@fpgeh.com> | 2019-08-06 14:50:00 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-08-06 14:50:00 -0700 |
| commit | 26cb3e7afc603b5aa703434c2cdfad444a4d4db0 (patch) | |
| tree | cb346623885c4bc1e98affc623084f58b0a87ce2 /techlibs/anlogic/anlogic_eqn.cc | |
| parent | 09beeee38a5af767f70d24e86c976e43b1b27547 (diff) | |
| parent | 8110fb9266e685aaea48359a5aebc4e5ac865240 (diff) | |
| download | yosys-26cb3e7afc603b5aa703434c2cdfad444a4d4db0.tar.gz yosys-26cb3e7afc603b5aa703434c2cdfad444a4d4db0.tar.bz2 yosys-26cb3e7afc603b5aa703434c2cdfad444a4d4db0.zip | |
Merge remote-tracking branch 'origin/master' into eddie/wreduce_add
Diffstat (limited to 'techlibs/anlogic/anlogic_eqn.cc')
| -rw-r--r-- | techlibs/anlogic/anlogic_eqn.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/techlibs/anlogic/anlogic_eqn.cc b/techlibs/anlogic/anlogic_eqn.cc index 741bf04cc..070d39a20 100644 --- a/techlibs/anlogic/anlogic_eqn.cc +++ b/techlibs/anlogic/anlogic_eqn.cc @@ -69,7 +69,7 @@ struct AnlogicEqnPass : public Pass { extra_args(args, args.size(), design); - size_t cnt = 0; + int cnt = 0; for (auto module : design->selected_modules()) { for (auto cell : module->selected_cells()) @@ -106,7 +106,7 @@ struct AnlogicEqnPass : public Pass { } } } - log_header(design, "Updated %lu of AL_MAP_LUT* elements with equation.\n", cnt); + log_header(design, "Updated %d of AL_MAP_LUT* elements with equation.\n", cnt); } } AnlogicEqnPass; |