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author | Clifford Wolf <clifford@clifford.at> | 2014-02-06 13:10:06 +0100 |
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committer | Clifford Wolf <clifford@clifford.at> | 2014-02-06 13:10:06 +0100 |
commit | c13c5b9b7b0925c602661bfcde8b45a538412f4b (patch) | |
tree | ea1f373f23a2fbdbab9ea1d604d34bf14274295e /passes | |
parent | eb8fd4a1631591f5fcc0a8d9a0e88b684d9f7607 (diff) | |
download | yosys-c13c5b9b7b0925c602661bfcde8b45a538412f4b.tar.gz yosys-c13c5b9b7b0925c602661bfcde8b45a538412f4b.tar.bz2 yosys-c13c5b9b7b0925c602661bfcde8b45a538412f4b.zip |
Changed techmap description from "simple" to "generic"
Diffstat (limited to 'passes')
-rw-r--r-- | passes/techmap/techmap.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/techmap/techmap.cc b/passes/techmap/techmap.cc index 08e314081..eeeebd111 100644 --- a/passes/techmap/techmap.cc +++ b/passes/techmap/techmap.cc @@ -363,7 +363,7 @@ static bool techmap_module(RTLIL::Design *design, RTLIL::Module *module, RTLIL:: } struct TechmapPass : public Pass { - TechmapPass() : Pass("techmap", "simple technology mapper") { } + TechmapPass() : Pass("techmap", "generic technology mapper") { } virtual void help() { // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| |