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| author | Miodrag Milanovic <mmicko@gmail.com> | 2022-01-31 09:38:25 +0100 |
|---|---|---|
| committer | Miodrag Milanovic <mmicko@gmail.com> | 2022-01-31 09:38:25 +0100 |
| commit | a6959d30df067c27da75d12bc0bd5233eb91d3ca (patch) | |
| tree | ad38d037f51e76b813bced9357fa4cb3419fda51 /passes | |
| parent | cbadfa02689ddbd5e9e75324aeb15b2c797d8cc4 (diff) | |
| download | yosys-a6959d30df067c27da75d12bc0bd5233eb91d3ca.tar.gz yosys-a6959d30df067c27da75d12bc0bd5233eb91d3ca.tar.bz2 yosys-a6959d30df067c27da75d12bc0bd5233eb91d3ca.zip | |
Use edges when explicit
Diffstat (limited to 'passes')
| -rw-r--r-- | passes/sat/sim.cc | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/passes/sat/sim.cc b/passes/sat/sim.cc index e67f8246b..ff815b69a 100644 --- a/passes/sat/sim.cc +++ b/passes/sat/sim.cc @@ -74,6 +74,7 @@ struct SimShared double start_time = 0; double stop_time = -1; SimulationMode sim_mode = SimulationMode::cmp; + bool cycles_set = false; }; void zinit(State &v) @@ -1016,7 +1017,9 @@ struct SimWorker : SimShared log_error("Stop time is before start time\n"); } auto edges = fst->getAllEdges(fst_clock, startCount, stopCount); - + if (cycles_set && ((size_t)(numcycles *2) < edges.size())) + edges.erase(edges.begin() + (numcycles*2), edges.end()); + if ((startCount == stopCount) && writeback) { log("Update initial state with values from %zu\n",startCount); if (edges.empty()) @@ -1143,6 +1146,7 @@ struct SimPass : public Pass { } if (args[argidx] == "-n" && argidx+1 < args.size()) { numcycles = atoi(args[++argidx].c_str()); + worker.cycles_set = true; continue; } if (args[argidx] == "-rstlen" && argidx+1 < args.size()) { |