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| author | Eddie Hung <eddie@fpgeh.com> | 2019-09-02 12:13:33 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-09-02 12:13:33 -0700 |
| commit | 7e8f7f4c59c96897159d32771d0c7179c5474281 (patch) | |
| tree | 1485f73353e8fe1a7825b41a9306b093ca93f774 /passes | |
| parent | f76cb584940fa3217de28febdb103443b8a8cf37 (diff) | |
| parent | 4aa505d1b254b3fbb66af2d95b396a8f077da9d0 (diff) | |
| download | yosys-7e8f7f4c59c96897159d32771d0c7179c5474281.tar.gz yosys-7e8f7f4c59c96897159d32771d0c7179c5474281.tar.bz2 yosys-7e8f7f4c59c96897159d32771d0c7179c5474281.zip | |
Merge branch 'master' of github.com:YosysHQ/yosys
Diffstat (limited to 'passes')
| -rw-r--r-- | passes/cmds/select.cc | 4 | ||||
| -rw-r--r-- | passes/pmgen/ice40_dsp.cc | 5 |
2 files changed, 2 insertions, 7 deletions
diff --git a/passes/cmds/select.cc b/passes/cmds/select.cc index 59d10a1b8..0f1f05ccb 100644 --- a/passes/cmds/select.cc +++ b/passes/cmds/select.cc @@ -664,7 +664,7 @@ static void select_stmt(RTLIL::Design *design, std::string arg) } else if (arg == "%D") { if (work_stack.size() < 2) - log_cmd_error("Must have at least two elements on the stack for operator %%d.\n"); + log_cmd_error("Must have at least two elements on the stack for operator %%D.\n"); select_op_diff(design, work_stack[work_stack.size()-1], work_stack[work_stack.size()-2]); work_stack[work_stack.size()-2] = work_stack[work_stack.size()-1]; work_stack.pop_back(); @@ -693,7 +693,7 @@ static void select_stmt(RTLIL::Design *design, std::string arg) } else if (arg == "%C") { if (work_stack.size() < 1) - log_cmd_error("Must have at least one element on the stack for operator %%M.\n"); + log_cmd_error("Must have at least one element on the stack for operator %%C.\n"); select_op_module_to_cells(design, work_stack[work_stack.size()-1]); } else if (arg == "%c") { diff --git a/passes/pmgen/ice40_dsp.cc b/passes/pmgen/ice40_dsp.cc index 39d033a04..16bfe537f 100644 --- a/passes/pmgen/ice40_dsp.cc +++ b/passes/pmgen/ice40_dsp.cc @@ -64,11 +64,6 @@ void create_ice40_dsp(ice40_dsp_pm &pm) bool mul_signed = st.mul->getParam("\\A_SIGNED").as_bool(); - if (mul_signed) { - log(" inference of signed iCE40 DSP arithmetic is currently not supported.\n"); - return; - } - log(" replacing $mul with SB_MAC16 cell.\n"); Cell *cell = pm.module->addCell(NEW_ID, "\\SB_MAC16"); |