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| author | whitequark <whitequark@whitequark.org> | 2019-08-20 00:45:41 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-08-20 00:45:41 +0000 |
| commit | 749ff864aa708cb069fc5c356e5db69664fdd93e (patch) | |
| tree | e120c95f7f307d10e146067b064774eddf146587 /passes | |
| parent | 3f4886e7a3ff14578b9c6d614efd360478e5886e (diff) | |
| parent | 4a942ba7b9bb76f207adf23369f46d31f7607b75 (diff) | |
| download | yosys-749ff864aa708cb069fc5c356e5db69664fdd93e.tar.gz yosys-749ff864aa708cb069fc5c356e5db69664fdd93e.tar.bz2 yosys-749ff864aa708cb069fc5c356e5db69664fdd93e.zip | |
Merge pull request #1309 from whitequark/proc_clean-fix-1268
proc_clean: fix order of switch insertion
Diffstat (limited to 'passes')
| -rw-r--r-- | passes/proc/proc_clean.cc | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/passes/proc/proc_clean.cc b/passes/proc/proc_clean.cc index 97f4c6573..114c6ab03 100644 --- a/passes/proc/proc_clean.cc +++ b/passes/proc/proc_clean.cc @@ -69,8 +69,7 @@ void proc_clean_switch(RTLIL::SwitchRule *sw, RTLIL::CaseRule *parent, bool &did did_something = true; for (auto &action : sw->cases[0]->actions) parent->actions.push_back(action); - for (auto sw2 : sw->cases[0]->switches) - parent->switches.push_back(sw2); + parent->switches.insert(parent->switches.begin(), sw->cases[0]->switches.begin(), sw->cases[0]->switches.end()); sw->cases[0]->switches.clear(); delete sw->cases[0]; sw->cases.clear(); |