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| author | Clifford Wolf <clifford@clifford.at> | 2016-11-15 13:35:19 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2016-11-15 13:35:19 +0100 |
| commit | 70d7a02cae7ef38eb4f3afcf325979b80e87518e (patch) | |
| tree | 431ec96bb8b4e8d4749cac8fd2bde537b070f354 /passes | |
| parent | a926a6afc2cf6ab7aed2c18950c6cd38d21f2a51 (diff) | |
| download | yosys-70d7a02cae7ef38eb4f3afcf325979b80e87518e.tar.gz yosys-70d7a02cae7ef38eb4f3afcf325979b80e87518e.tar.bz2 yosys-70d7a02cae7ef38eb4f3afcf325979b80e87518e.zip | |
Added support for hierarchical defparams
Diffstat (limited to 'passes')
| -rw-r--r-- | passes/hierarchy/hierarchy.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/hierarchy/hierarchy.cc b/passes/hierarchy/hierarchy.cc index e21a7a4e3..376df5698 100644 --- a/passes/hierarchy/hierarchy.cc +++ b/passes/hierarchy/hierarchy.cc @@ -213,7 +213,7 @@ bool expand_module(RTLIL::Design *design, RTLIL::Module *module, bool flag_check log_error("Module `%s' referenced in module `%s' in cell `%s' does not have a port named '%s'.\n", log_id(cell->type), log_id(module), log_id(cell), log_id(conn.first)); for (auto ¶m : cell->parameters) - if (mod->avail_parameters.count(param.first) == 0 && param.first[0] != '$') + if (mod->avail_parameters.count(param.first) == 0 && param.first[0] != '$' && strchr(param.first.c_str(), '.') == NULL) log_error("Module `%s' referenced in module `%s' in cell `%s' does not have a parameter named '%s'.\n", log_id(cell->type), log_id(module), log_id(cell), log_id(param.first)); } |