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| author | Eddie Hung <eddie@fpgeh.com> | 2019-08-28 19:59:09 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-08-28 19:59:09 -0700 |
| commit | 34ae29295db53289e786c0279ed00474cf0294d3 (patch) | |
| tree | aa4d36bdbfe9ff8ab6d1ceee8591f72179068d58 /passes | |
| parent | 1fdb3fc98cdbd7126f07778397e3c334f45945df (diff) | |
| download | yosys-34ae29295db53289e786c0279ed00474cf0294d3.tar.gz yosys-34ae29295db53289e786c0279ed00474cf0294d3.tar.bz2 yosys-34ae29295db53289e786c0279ed00474cf0294d3.zip | |
read_verilog -defer should still populate module attributes
Diffstat (limited to 'passes')
0 files changed, 0 insertions, 0 deletions