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author | YRabbit <rabbit@yrabbit.cyou> | 2022-02-02 21:14:38 +1000 |
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committer | YRabbit <rabbit@yrabbit.cyou> | 2022-02-02 21:14:38 +1000 |
commit | f5609d52c4206d2ce634b0b47510120281a7dcf1 (patch) | |
tree | 7e2fb8db5a1da45cca6c188b8f8ccba04cb1cb25 /passes/techmap | |
parent | 0a6e2bd5d51025b83d4ff7474e65dd2decf673d5 (diff) | |
download | yosys-f5609d52c4206d2ce634b0b47510120281a7dcf1.tar.gz yosys-f5609d52c4206d2ce634b0b47510120281a7dcf1.tar.bz2 yosys-f5609d52c4206d2ce634b0b47510120281a7dcf1.zip |
Correct a typo in the manual
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
Diffstat (limited to 'passes/techmap')
-rw-r--r-- | passes/techmap/iopadmap.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/techmap/iopadmap.cc b/passes/techmap/iopadmap.cc index 990e28876..437ad5156 100644 --- a/passes/techmap/iopadmap.cc +++ b/passes/techmap/iopadmap.cc @@ -46,7 +46,7 @@ struct IopadmapPass : public Pass { log(" -inpad <celltype> <in_port>[:<ext_port>]\n"); log(" Map module input ports to the given cell type with the\n"); log(" given output port name. if a 2nd portname is given, the\n"); - log(" signal is passed through the pad call, using the 2nd\n"); + log(" signal is passed through the pad cell, using the 2nd\n"); log(" portname as the port facing the module port.\n"); log("\n"); log(" -outpad <celltype> <out_port>[:<ext_port>]\n"); |