diff options
author | Eddie Hung <eddie@fpgeh.com> | 2019-06-06 14:06:59 -0700 |
---|---|---|
committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-06 14:06:59 -0700 |
commit | eaee250a6e63e58dfef63fa30c4120db78223e24 (patch) | |
tree | 972c0622281ee553a5afbd7544bcbba8a11ae45b /passes/techmap | |
parent | 935df3569b4677ac38041ff01a2f67185681f4e3 (diff) | |
parent | 0a66720f6f67b087fe6342d01d45944506240942 (diff) | |
download | yosys-eaee250a6e63e58dfef63fa30c4120db78223e24.tar.gz yosys-eaee250a6e63e58dfef63fa30c4120db78223e24.tar.bz2 yosys-eaee250a6e63e58dfef63fa30c4120db78223e24.zip |
Merge remote-tracking branch 'origin/eddie/muxpack' into xc7mux
Diffstat (limited to 'passes/techmap')
-rw-r--r-- | passes/techmap/shregmap.cc | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/passes/techmap/shregmap.cc b/passes/techmap/shregmap.cc index 3868bbb89..e4c811cfb 100644 --- a/passes/techmap/shregmap.cc +++ b/passes/techmap/shregmap.cc @@ -723,6 +723,9 @@ struct ShregmapPass : public Pass { log(" -tech greenpak4\n"); log(" map to greenpak4 shift registers.\n"); log("\n"); + log(" -tech xilinx\n"); + log(" map to xilinx dynamic-length shift registers.\n"); + log("\n"); } void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE { |