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author | Clifford Wolf <clifford@clifford.at> | 2014-07-31 02:32:00 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2014-07-31 02:32:00 +0200 |
commit | 1202f7aa4bb0f9afde157ebc4701d64e7e38abd8 (patch) | |
tree | d1a4bb9dfe62ac911ca4751a98b3b63dba22af40 /passes/techmap/techmap.cc | |
parent | 6ca0c569d92883b6eac1725204de90aee4af31bc (diff) | |
download | yosys-1202f7aa4bb0f9afde157ebc4701d64e7e38abd8.tar.gz yosys-1202f7aa4bb0f9afde157ebc4701d64e7e38abd8.tar.bz2 yosys-1202f7aa4bb0f9afde157ebc4701d64e7e38abd8.zip |
Renamed "stdcells.v" to "techmap.v"
Diffstat (limited to 'passes/techmap/techmap.cc')
-rw-r--r-- | passes/techmap/techmap.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/passes/techmap/techmap.cc b/passes/techmap/techmap.cc index 50936af0e..2aa59e61b 100644 --- a/passes/techmap/techmap.cc +++ b/passes/techmap/techmap.cc @@ -26,7 +26,7 @@ #include <stdio.h> #include <string.h> -#include "passes/techmap/stdcells.inc" +#include "passes/techmap/techmap.inc" // see simplemap.cc extern void simplemap_get_mappers(std::map<std::string, void(*)(RTLIL::Module*, RTLIL::Cell*)> &mappers); @@ -790,7 +790,7 @@ struct TechmapPass : public Pass { RTLIL::Design *map = new RTLIL::Design; if (map_files.empty()) { FILE *f = fmemopen(stdcells_code, strlen(stdcells_code), "rt"); - Frontend::frontend_call(map, f, "<stdcells.v>", verilog_frontend); + Frontend::frontend_call(map, f, "<techmap.v>", verilog_frontend); fclose(f); } else for (auto &fn : map_files) |