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| author | Clifford Wolf <clifford@clifford.at> | 2019-04-20 11:10:05 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2019-04-20 11:10:05 +0200 |
| commit | b7445ef3871b38360440d5c83dbac45c96b67277 (patch) | |
| tree | 76818d99c1633a78b78b2881656f40f9393f82b7 /passes/techmap/simplemap.cc | |
| parent | 5b915f01539c993466e83593ee8ae69b45360b81 (diff) | |
| download | yosys-b7445ef3871b38360440d5c83dbac45c96b67277.tar.gz yosys-b7445ef3871b38360440d5c83dbac45c96b67277.tar.bz2 yosys-b7445ef3871b38360440d5c83dbac45c96b67277.zip | |
Check blackbox attribute in techmap/simplemap
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'passes/techmap/simplemap.cc')
| -rw-r--r-- | passes/techmap/simplemap.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/techmap/simplemap.cc b/passes/techmap/simplemap.cc index 660b60601..f3da80c66 100644 --- a/passes/techmap/simplemap.cc +++ b/passes/techmap/simplemap.cc @@ -599,7 +599,7 @@ struct SimplemapPass : public Pass { simplemap_get_mappers(mappers); for (auto mod : design->modules()) { - if (!design->selected(mod)) + if (!design->selected(mod) || mod->get_blackbox_attribute()) continue; std::vector<RTLIL::Cell*> cells = mod->cells(); for (auto cell : cells) { |