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| author | Miodrag Milanovic <mmicko@gmail.com> | 2019-08-18 11:47:46 +0200 |
|---|---|---|
| committer | Miodrag Milanovic <mmicko@gmail.com> | 2019-08-18 11:47:46 +0200 |
| commit | 4a32e29445f65edd1726808a7353a9d0e2560c00 (patch) | |
| tree | 179544dd193fe72b3658269cb22a6eae66bee8a1 /passes/techmap/nlutmap.cc | |
| parent | 5f561bdcb1d562d6f975b4a27beca1b8b7af908f (diff) | |
| parent | 98a54353b7d893752d856b3726853d4921c6aa1f (diff) | |
| download | yosys-4a32e29445f65edd1726808a7353a9d0e2560c00.tar.gz yosys-4a32e29445f65edd1726808a7353a9d0e2560c00.tar.bz2 yosys-4a32e29445f65edd1726808a7353a9d0e2560c00.zip | |
Merge remote-tracking branch 'upstream/master' into anlogic_fixes
Diffstat (limited to 'passes/techmap/nlutmap.cc')
| -rw-r--r-- | passes/techmap/nlutmap.cc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/passes/techmap/nlutmap.cc b/passes/techmap/nlutmap.cc index cc765d89c..798d82248 100644 --- a/passes/techmap/nlutmap.cc +++ b/passes/techmap/nlutmap.cc @@ -82,10 +82,10 @@ struct NlutmapWorker for (auto cell : module->cells()) { - if (cell->type != "$lut" || mapped_cells.count(cell)) + if (cell->type != ID($lut) || mapped_cells.count(cell)) continue; - if (GetSize(cell->getPort("\\A")) == lut_size || lut_size == 2) + if (GetSize(cell->getPort(ID::A)) == lut_size || lut_size == 2) candidate_ratings[cell] = 0; for (auto &conn : cell->connections()) @@ -119,7 +119,7 @@ struct NlutmapWorker if (config.assert_mode) { for (auto cell : module->cells()) - if (cell->type == "$lut" && !mapped_cells.count(cell)) + if (cell->type == ID($lut) && !mapped_cells.count(cell)) log_error("Insufficient number of LUTs to map all logic cells!\n"); } |