diff options
author | Aman Goel <amangoel@umich.edu> | 2018-08-18 08:18:40 +0530 |
---|---|---|
committer | GitHub <noreply@github.com> | 2018-08-18 08:18:40 +0530 |
commit | 61f002c908830d59e883d25668b731e7d12470d0 (patch) | |
tree | 25174f7321f60e14ca6c144544f29971c40abe9b /passes/techmap/insbuf.cc | |
parent | 5dcb899e76a82c8aa84552a59f4a9f64394e7785 (diff) | |
parent | e343f3e6d475984c21611474bffe7dcd8f599497 (diff) | |
download | yosys-61f002c908830d59e883d25668b731e7d12470d0.tar.gz yosys-61f002c908830d59e883d25668b731e7d12470d0.tar.bz2 yosys-61f002c908830d59e883d25668b731e7d12470d0.zip |
Merge pull request #3 from YosysHQ/master
Updates from official repo
Diffstat (limited to 'passes/techmap/insbuf.cc')
-rw-r--r-- | passes/techmap/insbuf.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/passes/techmap/insbuf.cc b/passes/techmap/insbuf.cc index aa81468dc..2173049b4 100644 --- a/passes/techmap/insbuf.cc +++ b/passes/techmap/insbuf.cc @@ -25,7 +25,7 @@ PRIVATE_NAMESPACE_BEGIN struct InsbufPass : public Pass { InsbufPass() : Pass("insbuf", "insert buffer cells for connected wires") { } - virtual void help() + void help() YS_OVERRIDE { log("\n"); log(" insbuf [options] [selection]\n"); @@ -37,7 +37,7 @@ struct InsbufPass : public Pass { log(" call to \"clean\" will remove all $_BUF_ in the design.)\n"); log("\n"); } - virtual void execute(std::vector<std::string> args, RTLIL::Design *design) + void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE { log_header(design, "Executing INSBUF pass (insert buffer cells for connected wires).\n"); |