diff options
| author | Sahand Kashani <sahand.kashani@gmail.com> | 2020-04-08 23:50:37 +0200 |
|---|---|---|
| committer | Sahand Kashani <sahand.kashani@gmail.com> | 2020-04-08 23:50:37 +0200 |
| commit | 9edf8869c18951ec2b75f074065f073da3253244 (patch) | |
| tree | 09fba95ba6d3f93ecab828c84b9ff3f74160d7b9 /passes/techmap/dffinit.cc | |
| parent | 820e3d1dad4f484f9646588f79b73b21b495e3d8 (diff) | |
| parent | 5f649fc19d5cef76a634572ad0a493f1d2fd6306 (diff) | |
| download | yosys-9edf8869c18951ec2b75f074065f073da3253244.tar.gz yosys-9edf8869c18951ec2b75f074065f073da3253244.tar.bz2 yosys-9edf8869c18951ec2b75f074065f073da3253244.zip | |
Merge branch 'master' of github.com:YosysHQ/yosys into firrtl_backend_fileinfo
Diffstat (limited to 'passes/techmap/dffinit.cc')
| -rw-r--r-- | passes/techmap/dffinit.cc | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/passes/techmap/dffinit.cc b/passes/techmap/dffinit.cc index cf9301442..0424ce434 100644 --- a/passes/techmap/dffinit.cc +++ b/passes/techmap/dffinit.cc @@ -99,8 +99,8 @@ struct DffinitPass : public Pass { pool<SigBit> used_bits; for (auto wire : module->selected_wires()) { - if (wire->attributes.count(ID(init))) { - Const value = wire->attributes.at(ID(init)); + if (wire->attributes.count(ID::init)) { + Const value = wire->attributes.at(ID::init); for (int i = 0; i < min(GetSize(value), GetSize(wire)); i++) if (value[i] != State::Sx) init_bits[sigmap(SigBit(wire, i))] = value[i]; @@ -161,8 +161,8 @@ struct DffinitPass : public Pass { } for (auto wire : module->selected_wires()) - if (wire->attributes.count(ID(init))) { - Const &value = wire->attributes.at(ID(init)); + if (wire->attributes.count(ID::init)) { + Const &value = wire->attributes.at(ID::init); bool do_cleanup = true; for (int i = 0; i < min(GetSize(value), GetSize(wire)); i++) { SigBit bit = sigmap(SigBit(wire, i)); @@ -173,7 +173,7 @@ struct DffinitPass : public Pass { } if (do_cleanup) { log("Removing init attribute from wire %s.%s.\n", log_id(module), log_id(wire)); - wire->attributes.erase(ID(init)); + wire->attributes.erase(ID::init); } } } |