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| author | Benedikt Tutzer <benedikt.tutzer@tuwien.ac.at> | 2019-03-28 12:16:39 +0100 |
|---|---|---|
| committer | Benedikt Tutzer <benedikt.tutzer@tuwien.ac.at> | 2019-03-28 12:16:39 +0100 |
| commit | 03d1606b42110f8eac7311ac57c7334d1f781273 (patch) | |
| tree | 9fc490a93fbb75ac3e23b276a151e22ca1a3b84e /passes/techmap/aigmap.cc | |
| parent | b9288b216dce110ad11eb0615a6a911a9fcae05b (diff) | |
| parent | 32bd0f22ec93202e67395901cdc64c20df7f0da7 (diff) | |
| download | yosys-03d1606b42110f8eac7311ac57c7334d1f781273.tar.gz yosys-03d1606b42110f8eac7311ac57c7334d1f781273.tar.bz2 yosys-03d1606b42110f8eac7311ac57c7334d1f781273.zip | |
Merge remote-tracking branch 'origin/master' into feature/python_bindings
Diffstat (limited to 'passes/techmap/aigmap.cc')
| -rw-r--r-- | passes/techmap/aigmap.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/passes/techmap/aigmap.cc b/passes/techmap/aigmap.cc index b9ac7aded..35df2ff79 100644 --- a/passes/techmap/aigmap.cc +++ b/passes/techmap/aigmap.cc @@ -25,7 +25,7 @@ PRIVATE_NAMESPACE_BEGIN struct AigmapPass : public Pass { AigmapPass() : Pass("aigmap", "map logic to and-inverter-graph circuit") { } - virtual void help() + void help() YS_OVERRIDE { log("\n"); log(" aigmap [options] [selection]\n"); @@ -37,7 +37,7 @@ struct AigmapPass : public Pass { log(" Enable creation of $_NAND_ cells\n"); log("\n"); } - virtual void execute(std::vector<std::string> args, RTLIL::Design *design) + void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE { bool nand_mode = false; |