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| author | Eddie Hung <eddie@fpgeh.com> | 2019-09-04 17:22:02 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-09-04 17:22:02 -0700 |
| commit | 09c26c55bb4357f0b7204d8a78806aa7ad12068f (patch) | |
| tree | 7b115e172ad716a3ae34ffb5d0ddeb34d312b0fd /passes/pmgen/xilinx_dsp.cc | |
| parent | 91ef4457b08e15da6b8af9522da002b76feefd06 (diff) | |
| download | yosys-09c26c55bb4357f0b7204d8a78806aa7ad12068f.tar.gz yosys-09c26c55bb4357f0b7204d8a78806aa7ad12068f.tar.bz2 yosys-09c26c55bb4357f0b7204d8a78806aa7ad12068f.zip | |
Get rid of sigBset too
Diffstat (limited to 'passes/pmgen/xilinx_dsp.cc')
| -rw-r--r-- | passes/pmgen/xilinx_dsp.cc | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/passes/pmgen/xilinx_dsp.cc b/passes/pmgen/xilinx_dsp.cc index 0d1937844..c742ef84d 100644 --- a/passes/pmgen/xilinx_dsp.cc +++ b/passes/pmgen/xilinx_dsp.cc @@ -23,10 +23,6 @@ USING_YOSYS_NAMESPACE PRIVATE_NAMESPACE_BEGIN -template<class T> inline bool includes(const T &lhs, const T &rhs) { - return std::includes(lhs.begin(), lhs.end(), rhs.begin(), rhs.end()); -} -#include <set> #include "passes/pmgen/xilinx_dsp_pm.h" void pack_xilinx_dsp(dict<SigBit, Cell*> &bit_to_driver, xilinx_dsp_pm &pm) |