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| author | Marcelina Kościelnicka <mwk@0x04.net> | 2020-08-09 13:53:01 +0200 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2020-08-09 13:57:00 +0200 |
| commit | 2ab350a7b01aab8f0ed39f518720d6e6792cd6d6 (patch) | |
| tree | fd6ebe9f88b7687c9ecf32b1b84d75773717dc6f /passes/opt/rmports.cc | |
| parent | 9a4f420b4b8285bd05181b6988c35ce45e3c979a (diff) | |
| download | yosys-2ab350a7b01aab8f0ed39f518720d6e6792cd6d6.tar.gz yosys-2ab350a7b01aab8f0ed39f518720d6e6792cd6d6.tar.bz2 yosys-2ab350a7b01aab8f0ed39f518720d6e6792cd6d6.zip | |
opt_clean: Fix module keep rules.
- wires with keep attribute now force a module to be kept
- presence of $memwr and $meminit cells no longer forces a module to be
kept
Diffstat (limited to 'passes/opt/rmports.cc')
0 files changed, 0 insertions, 0 deletions