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| author | Udi Finkelstein <github@udifink.com> | 2018-09-18 01:27:01 +0300 |
|---|---|---|
| committer | Udi Finkelstein <github@udifink.com> | 2018-09-18 01:27:01 +0300 |
| commit | c693f595c53e2e40840ff40b5b5ba06767582d23 (patch) | |
| tree | de5e3f353f3222abca7186996e88cd9d635a964b /passes/memory/memory_bram.cc | |
| parent | f6fe73b31f6e6d8966ad4ddae860b4d79133cce2 (diff) | |
| parent | 592a82c0ad8beb6de023aa2a131aab6472f949e8 (diff) | |
| download | yosys-c693f595c53e2e40840ff40b5b5ba06767582d23.tar.gz yosys-c693f595c53e2e40840ff40b5b5ba06767582d23.tar.bz2 yosys-c693f595c53e2e40840ff40b5b5ba06767582d23.zip | |
Merge branch 'master' into pr_reg_wire_error
Diffstat (limited to 'passes/memory/memory_bram.cc')
| -rw-r--r-- | passes/memory/memory_bram.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/passes/memory/memory_bram.cc b/passes/memory/memory_bram.cc index a7f9cf382..e8552bbcf 100644 --- a/passes/memory/memory_bram.cc +++ b/passes/memory/memory_bram.cc @@ -1120,7 +1120,7 @@ void handle_cell(Cell *cell, const rules_t &rules) struct MemoryBramPass : public Pass { MemoryBramPass() : Pass("memory_bram", "map memories to block rams") { } - virtual void help() + void help() YS_OVERRIDE { // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| log("\n"); @@ -1210,7 +1210,7 @@ struct MemoryBramPass : public Pass { log("the data bits to accommodate the enable pattern of port A.\n"); log("\n"); } - virtual void execute(vector<string> args, Design *design) + void execute(vector<string> args, Design *design) YS_OVERRIDE { rules_t rules; |