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authorAhmed Irfan <ahmedirfan1983@gmail.com>2014-09-22 11:35:04 +0200
committerAhmed Irfan <ahmedirfan1983@gmail.com>2014-09-22 11:35:04 +0200
commitd3c67ad9b61f602de1100cd264efd227dcacb417 (patch)
tree88c462c53bdab128cd1edbded42483772f82612a /passes/memory/memory.cc
parentb783dbe148e6d246ebd107c0913de2989ab5af48 (diff)
parent13117bb346dd02d2345f716b4403239aebe3d0e2 (diff)
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Merge branch 'master' of https://github.com/cliffordwolf/yosys into btor
added case for memwr cell that is used in muxes (same cell is used more than one time) corrected bug for xnor and logic_not added pmux cell translation Conflicts: backends/btor/btor.cc
Diffstat (limited to 'passes/memory/memory.cc')
-rw-r--r--passes/memory/memory.cc6
1 files changed, 6 insertions, 0 deletions
diff --git a/passes/memory/memory.cc b/passes/memory/memory.cc
index 680657a79..fc3095535 100644
--- a/passes/memory/memory.cc
+++ b/passes/memory/memory.cc
@@ -33,6 +33,9 @@ struct MemoryPass : public Pass {
log("This pass calls all the other memory_* passes in a useful order:\n");
log("\n");
log(" memory_dff\n");
+ log(" opt_clean\n");
+ log(" memory_share\n");
+ log(" opt_clean\n");
log(" memory_collect\n");
log(" memory_map (skipped if called with -nomap)\n");
log("\n");
@@ -58,6 +61,9 @@ struct MemoryPass : public Pass {
extra_args(args, argidx, design);
Pass::call(design, "memory_dff");
+ Pass::call(design, "opt_clean");
+ Pass::call(design, "memory_share");
+ Pass::call(design, "opt_clean");
Pass::call(design, "memory_collect");
if (!flag_nomap)