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| author | Clifford Wolf <clifford@clifford.at> | 2016-10-22 11:05:49 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2016-10-22 11:05:49 +0200 |
| commit | aa7226233023dcd53a28de837de74fb60fa9d691 (patch) | |
| tree | 9cf5abd4a5eba771e06225aba7e931692943a6dd /passes/hierarchy | |
| parent | 3655d7fea7ce7f41716bd383d962119b7bf84038 (diff) | |
| download | yosys-aa7226233023dcd53a28de837de74fb60fa9d691.tar.gz yosys-aa7226233023dcd53a28de837de74fb60fa9d691.tar.bz2 yosys-aa7226233023dcd53a28de837de74fb60fa9d691.zip | |
Added avail params to ilang format, check module params in 'hierarchy -check'
Diffstat (limited to 'passes/hierarchy')
| -rw-r--r-- | passes/hierarchy/hierarchy.cc | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/passes/hierarchy/hierarchy.cc b/passes/hierarchy/hierarchy.cc index 4d1e3987b..9db407c7a 100644 --- a/passes/hierarchy/hierarchy.cc +++ b/passes/hierarchy/hierarchy.cc @@ -212,6 +212,10 @@ bool expand_module(RTLIL::Design *design, RTLIL::Module *module, bool flag_check } else if (mod->wire(conn.first) == nullptr || mod->wire(conn.first)->port_id == 0) log_error("Module `%s' referenced in module `%s' in cell `%s' does not have a port named '%s'.\n", log_id(cell->type), log_id(module), log_id(cell), log_id(conn.first)); + for (auto ¶m : cell->parameters) + if (mod->avail_parameters.count(param.first) == 0) + log_error("Module `%s' referenced in module `%s' in cell `%s' does not have a parameter named '%s'.\n", + log_id(cell->type), log_id(module), log_id(cell), log_id(param.first)); } if (cell->parameters.size() == 0) |