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author | Marcus Comstedt <marcus@mc.pp.se> | 2016-05-22 16:37:47 +0200 |
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committer | Marcus Comstedt <marcus@mc.pp.se> | 2016-05-22 16:41:26 +0200 |
commit | e22e4d59b8abe9ba60d32402d0ff9b84d266743d (patch) | |
tree | 93bc2f5722c0aac65b1cd98a5b1df04935b85796 /passes/hierarchy/hierarchy.cc | |
parent | 8e9e793126a2772eed4b041bc60415943c71d5ee (diff) | |
download | yosys-e22e4d59b8abe9ba60d32402d0ff9b84d266743d.tar.gz yosys-e22e4d59b8abe9ba60d32402d0ff9b84d266743d.tar.bz2 yosys-e22e4d59b8abe9ba60d32402d0ff9b84d266743d.zip |
Made the expansion order of hierarchy deterministic
Diffstat (limited to 'passes/hierarchy/hierarchy.cc')
-rw-r--r-- | passes/hierarchy/hierarchy.cc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/passes/hierarchy/hierarchy.cc b/passes/hierarchy/hierarchy.cc index 460b3c693..94b93de5d 100644 --- a/passes/hierarchy/hierarchy.cc +++ b/passes/hierarchy/hierarchy.cc @@ -261,7 +261,7 @@ bool expand_module(RTLIL::Design *design, RTLIL::Module *module, bool flag_check return did_something; } -void hierarchy_worker(RTLIL::Design *design, std::set<RTLIL::Module*> &used, RTLIL::Module *mod, int indent) +void hierarchy_worker(RTLIL::Design *design, std::set<RTLIL::Module*, IdString::compare_ptr_by_name<Module>> &used, RTLIL::Module *mod, int indent) { if (used.count(mod) > 0) return; @@ -287,7 +287,7 @@ void hierarchy_worker(RTLIL::Design *design, std::set<RTLIL::Module*> &used, RTL void hierarchy_clean(RTLIL::Design *design, RTLIL::Module *top, bool purge_lib) { - std::set<RTLIL::Module*> used; + std::set<RTLIL::Module*, IdString::compare_ptr_by_name<Module>> used; hierarchy_worker(design, used, top, 0); std::vector<RTLIL::Module*> del_modules; @@ -523,7 +523,7 @@ struct HierarchyPass : public Pass { { did_something = false; - std::set<RTLIL::Module*> used_modules; + std::set<RTLIL::Module*, IdString::compare_ptr_by_name<Module>> used_modules; if (top_mod != NULL) { log_header(design, "Analyzing design hierarchy..\n"); hierarchy_worker(design, used_modules, top_mod, 0); |