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| author | Clifford Wolf <clifford@clifford.at> | 2016-07-12 09:46:15 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2016-07-12 09:46:15 +0200 |
| commit | e92998a79cec635270a350117eddb52c6232f388 (patch) | |
| tree | 2da5aa030336680bfa79b14e35f069123c0ba09e /passes/fsm/fsm_extract.cc | |
| parent | c71785d65e9775093b24ce684ed4fbe93bedb04d (diff) | |
| download | yosys-e92998a79cec635270a350117eddb52c6232f388.tar.gz yosys-e92998a79cec635270a350117eddb52c6232f388.tar.bz2 yosys-e92998a79cec635270a350117eddb52c6232f388.zip | |
Minor bugfix in FSM reset state detection
Diffstat (limited to 'passes/fsm/fsm_extract.cc')
| -rw-r--r-- | passes/fsm/fsm_extract.cc | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/passes/fsm/fsm_extract.cc b/passes/fsm/fsm_extract.cc index 95cb498e3..8a4ee3f26 100644 --- a/passes/fsm/fsm_extract.cc +++ b/passes/fsm/fsm_extract.cc @@ -92,12 +92,15 @@ static bool find_states(RTLIL::SigSpec sig, const RTLIL::SigSpec &dff_out, RTLIL if (reset_state && RTLIL::SigSpec(*reset_state).is_fully_undef()) do { + SigSpec new_reset_state; if (sig_aa.is_fully_def()) - *reset_state = sig_aa.as_const(); + new_reset_state = sig_aa.as_const(); else if (sig_bb.is_fully_def()) - *reset_state = sig_bb.as_const(); + new_reset_state = sig_bb.as_const(); else break; + new_reset_state.extend_u0(GetSize(*reset_state)); + *reset_state = new_reset_state.as_const(); log(" found reset state: %s (guessed from mux tree)\n", log_signal(*reset_state)); } while (0); |