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author | Claire Xen <claire@clairexen.net> | 2022-02-11 16:03:12 +0100 |
---|---|---|
committer | GitHub <noreply@github.com> | 2022-02-11 16:03:12 +0100 |
commit | 49545c73f7f5a5cf73d287fd371f2ff39311f621 (patch) | |
tree | d0f20b8def36e551c6735d4fc6033aaa2633fe80 /passes/equiv | |
parent | 90b40aa51f7d666792d4f0b1830ee75b81678a1f (diff) | |
parent | e0165188669fcef2c5784c9916683889a2164e5d (diff) | |
download | yosys-49545c73f7f5a5cf73d287fd371f2ff39311f621.tar.gz yosys-49545c73f7f5a5cf73d287fd371f2ff39311f621.tar.bz2 yosys-49545c73f7f5a5cf73d287fd371f2ff39311f621.zip |
Merge branch 'master' into clk2ff-better-names
Diffstat (limited to 'passes/equiv')
-rw-r--r-- | passes/equiv/equiv_add.cc | 2 | ||||
-rw-r--r-- | passes/equiv/equiv_induct.cc | 7 | ||||
-rw-r--r-- | passes/equiv/equiv_make.cc | 2 | ||||
-rw-r--r-- | passes/equiv/equiv_mark.cc | 2 | ||||
-rw-r--r-- | passes/equiv/equiv_miter.cc | 2 | ||||
-rw-r--r-- | passes/equiv/equiv_purge.cc | 2 | ||||
-rw-r--r-- | passes/equiv/equiv_remove.cc | 2 | ||||
-rw-r--r-- | passes/equiv/equiv_simple.cc | 10 | ||||
-rw-r--r-- | passes/equiv/equiv_status.cc | 2 | ||||
-rw-r--r-- | passes/equiv/equiv_struct.cc | 2 |
10 files changed, 20 insertions, 13 deletions
diff --git a/passes/equiv/equiv_add.cc b/passes/equiv/equiv_add.cc index 2abbb59bb..1bcd4a887 100644 --- a/passes/equiv/equiv_add.cc +++ b/passes/equiv/equiv_add.cc @@ -1,7 +1,7 @@ /* * yosys -- Yosys Open SYnthesis Suite * - * Copyright (C) 2012 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com> * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above diff --git a/passes/equiv/equiv_induct.cc b/passes/equiv/equiv_induct.cc index 37aec50cd..8d882ae83 100644 --- a/passes/equiv/equiv_induct.cc +++ b/passes/equiv/equiv_induct.cc @@ -1,7 +1,7 @@ /* * yosys -- Yosys Open SYnthesis Suite * - * Copyright (C) 2012 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com> * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above @@ -55,7 +55,10 @@ struct EquivInductWorker for (auto cell : cells) { if (!satgen.importCell(cell, step) && !cell_warn_cache.count(cell)) { - log_warning("No SAT model available for cell %s (%s).\n", log_id(cell), log_id(cell->type)); + if (RTLIL::builtin_ff_cell_types().count(cell->type)) + log_warning("No SAT model available for async FF cell %s (%s). Consider running `async2sync` or `clk2fflogic` first.\n", log_id(cell), log_id(cell->type)); + else + log_warning("No SAT model available for cell %s (%s).\n", log_id(cell), log_id(cell->type)); cell_warn_cache.insert(cell); } if (cell->type == ID($equiv)) { diff --git a/passes/equiv/equiv_make.cc b/passes/equiv/equiv_make.cc index 6923ae3d0..7ef2827bf 100644 --- a/passes/equiv/equiv_make.cc +++ b/passes/equiv/equiv_make.cc @@ -1,7 +1,7 @@ /* * yosys -- Yosys Open SYnthesis Suite * - * Copyright (C) 2012 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com> * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above diff --git a/passes/equiv/equiv_mark.cc b/passes/equiv/equiv_mark.cc index a722b5ed6..97a2a38dd 100644 --- a/passes/equiv/equiv_mark.cc +++ b/passes/equiv/equiv_mark.cc @@ -1,7 +1,7 @@ /* * yosys -- Yosys Open SYnthesis Suite * - * Copyright (C) 2012 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com> * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above diff --git a/passes/equiv/equiv_miter.cc b/passes/equiv/equiv_miter.cc index e028f806a..6acfe85a9 100644 --- a/passes/equiv/equiv_miter.cc +++ b/passes/equiv/equiv_miter.cc @@ -1,7 +1,7 @@ /* * yosys -- Yosys Open SYnthesis Suite * - * Copyright (C) 2012 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com> * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above diff --git a/passes/equiv/equiv_purge.cc b/passes/equiv/equiv_purge.cc index a43ecec5a..5b0696d9b 100644 --- a/passes/equiv/equiv_purge.cc +++ b/passes/equiv/equiv_purge.cc @@ -1,7 +1,7 @@ /* * yosys -- Yosys Open SYnthesis Suite * - * Copyright (C) 2012 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com> * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above diff --git a/passes/equiv/equiv_remove.cc b/passes/equiv/equiv_remove.cc index 89442308b..5d1823e12 100644 --- a/passes/equiv/equiv_remove.cc +++ b/passes/equiv/equiv_remove.cc @@ -1,7 +1,7 @@ /* * yosys -- Yosys Open SYnthesis Suite * - * Copyright (C) 2012 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com> * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above diff --git a/passes/equiv/equiv_simple.cc b/passes/equiv/equiv_simple.cc index 408c5a793..7621341a7 100644 --- a/passes/equiv/equiv_simple.cc +++ b/passes/equiv/equiv_simple.cc @@ -1,7 +1,7 @@ /* * yosys -- Yosys Open SYnthesis Suite * - * Copyright (C) 2012 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com> * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above @@ -184,8 +184,12 @@ struct EquivSimpleWorker for (auto cell : problem_cells) { auto key = pair<Cell*, int>(cell, step+1); - if (!imported_cells_cache.count(key) && !satgen.importCell(cell, step+1)) - log_cmd_error("No SAT model available for cell %s (%s).\n", log_id(cell), log_id(cell->type)); + if (!imported_cells_cache.count(key) && !satgen.importCell(cell, step+1)) { + if (RTLIL::builtin_ff_cell_types().count(cell->type)) + log_cmd_error("No SAT model available for async FF cell %s (%s). Consider running `async2sync` or `clk2fflogic` first.\n", log_id(cell), log_id(cell->type)); + else + log_cmd_error("No SAT model available for cell %s (%s).\n", log_id(cell), log_id(cell->type)); + } imported_cells_cache.insert(key); } diff --git a/passes/equiv/equiv_status.cc b/passes/equiv/equiv_status.cc index 2db44ea90..b221be27c 100644 --- a/passes/equiv/equiv_status.cc +++ b/passes/equiv/equiv_status.cc @@ -1,7 +1,7 @@ /* * yosys -- Yosys Open SYnthesis Suite * - * Copyright (C) 2012 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com> * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above diff --git a/passes/equiv/equiv_struct.cc b/passes/equiv/equiv_struct.cc index 9784225db..39604994a 100644 --- a/passes/equiv/equiv_struct.cc +++ b/passes/equiv/equiv_struct.cc @@ -1,7 +1,7 @@ /* * yosys -- Yosys Open SYnthesis Suite * - * Copyright (C) 2012 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com> * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above |