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| author | Clifford Wolf <clifford@clifford.at> | 2014-07-24 22:47:57 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-07-24 23:10:58 +0200 |
| commit | 6aa792c864444324a1b140c2b63bd860f0cc3914 (patch) | |
| tree | 07b2bf3003864337df616a21374c046ddc352c62 /passes/cmds | |
| parent | 7a608437c65e9646ed229055d61b310e7d93e37e (diff) | |
| download | yosys-6aa792c864444324a1b140c2b63bd860f0cc3914.tar.gz yosys-6aa792c864444324a1b140c2b63bd860f0cc3914.tar.bz2 yosys-6aa792c864444324a1b140c2b63bd860f0cc3914.zip | |
Replaced more old SigChunk programming patterns
Diffstat (limited to 'passes/cmds')
| -rw-r--r-- | passes/cmds/show.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/passes/cmds/show.cc b/passes/cmds/show.cc index 6b37b7bb1..0a1d584ca 100644 --- a/passes/cmds/show.cc +++ b/passes/cmds/show.cc @@ -177,7 +177,7 @@ struct ShowWorker } if (sig.chunks().size() == 1) { - const RTLIL::SigChunk &c = sig.chunks()[0]; + const RTLIL::SigChunk &c = sig.chunks().front(); if (c.wire != NULL && design->selected_member(module->name, c.wire->name)) { if (!range_check || c.wire->width == c.width) return stringf("n%d", id2num(c.wire->name)); @@ -200,7 +200,7 @@ struct ShowWorker int pos = sig.size()-1; int idx = single_idx_count++; for (int i = int(sig.chunks().size())-1; i >= 0; i--) { - const RTLIL::SigChunk &c = sig.chunks()[i]; + const RTLIL::SigChunk &c = sig.chunks().at(i); net = gen_signode_simple(c, false); assert(!net.empty()); if (driver) { |