diff options
author | Eddie Hung <eddie@fpgeh.com> | 2020-04-16 12:23:34 -0700 |
---|---|---|
committer | Eddie Hung <eddie@fpgeh.com> | 2020-04-16 12:23:34 -0700 |
commit | 47c8ee7fe4c4935a11ed81b3d94069664e026dca (patch) | |
tree | a13c48ff5cdc345fa493449fc3d543d5e5e765b3 /passes/cmds | |
parent | 8d3f6d0d792a1cd688ce4d9c05bef8ec601f9334 (diff) | |
download | yosys-47c8ee7fe4c4935a11ed81b3d94069664e026dca.tar.gz yosys-47c8ee7fe4c4935a11ed81b3d94069664e026dca.tar.bz2 yosys-47c8ee7fe4c4935a11ed81b3d94069664e026dca.zip |
select: do not select inside blackboxes
Diffstat (limited to 'passes/cmds')
-rw-r--r-- | passes/cmds/select.cc | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/passes/cmds/select.cc b/passes/cmds/select.cc index b64b077e4..b4f3b921a 100644 --- a/passes/cmds/select.cc +++ b/passes/cmds/select.cc @@ -809,6 +809,9 @@ static void select_stmt(RTLIL::Design *design, std::string arg, bool disable_emp continue; } + if (mod->get_blackbox_attribute()) + continue; + if (arg_memb.compare(0, 2, "w:") == 0) { for (auto wire : mod->wires()) if (match_ids(wire->name, arg_memb.substr(2))) |