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| author | Clifford Wolf <clifford@clifford.at> | 2014-09-27 16:17:53 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-09-27 16:17:53 +0200 |
| commit | f9a307a50b5ce67b67d2b53e8c1334ea23ffd997 (patch) | |
| tree | 5a591d0d03c9623abc02aaa3773458193f67ffa1 /passes/cmds/connect.cc | |
| parent | bcd2625a8247ddbcf4a8a819eadcb03846537223 (diff) | |
| download | yosys-f9a307a50b5ce67b67d2b53e8c1334ea23ffd997.tar.gz yosys-f9a307a50b5ce67b67d2b53e8c1334ea23ffd997.tar.bz2 yosys-f9a307a50b5ce67b67d2b53e8c1334ea23ffd997.zip | |
namespace Yosys
Diffstat (limited to 'passes/cmds/connect.cc')
| -rw-r--r-- | passes/cmds/connect.cc | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/passes/cmds/connect.cc b/passes/cmds/connect.cc index 30c80f732..e17c1b1c3 100644 --- a/passes/cmds/connect.cc +++ b/passes/cmds/connect.cc @@ -23,6 +23,9 @@ #include "kernel/celltypes.h" #include "kernel/log.h" +USING_YOSYS_NAMESPACE +PRIVATE_NAMESPACE_BEGIN + static void unset_drivers(RTLIL::Design *design, RTLIL::Module *module, SigMap &sigmap, RTLIL::SigSpec &sig) { CellTypes ct(design); @@ -183,3 +186,4 @@ struct ConnectPass : public Pass { } } ConnectPass; +PRIVATE_NAMESPACE_END |