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authorClifford Wolf <clifford@clifford.at>2014-07-26 14:32:50 +0200
committerClifford Wolf <clifford@clifford.at>2014-07-26 15:58:23 +0200
commitb7dda723022ad00c6c0089be888eab319953faa8 (patch)
tree4fe12ce120f1809891dc4cbd862bbcdab0e90fcc /passes/cmds/connect.cc
parentcd6574ecf652901573cbc6b89e1a59dd383ec496 (diff)
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Changed users of cell->connections_ to the new API (sed command)
git grep -l 'connections_' | xargs sed -i -r -e ' s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g; s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g; s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g; s/(->|\.)connections_.push_back/\1connect/g; s/(->|\.)connections_/\1connections()/g;'
Diffstat (limited to 'passes/cmds/connect.cc')
-rw-r--r--passes/cmds/connect.cc10
1 files changed, 5 insertions, 5 deletions
diff --git a/passes/cmds/connect.cc b/passes/cmds/connect.cc
index ea05026f3..ffe7a5efa 100644
--- a/passes/cmds/connect.cc
+++ b/passes/cmds/connect.cc
@@ -30,11 +30,11 @@ static void unset_drivers(RTLIL::Design *design, RTLIL::Module *module, SigMap &
RTLIL::Wire *dummy_wire = module->addWire(NEW_ID, sig.size());
for (auto &it : module->cells)
- for (auto &port : it.second->connections_)
+ for (auto &port : it.second->connections())
if (ct.cell_output(it.second->type, port.first))
sigmap(port.second).replace(sig, dummy_wire, &port.second);
- for (auto &conn : module->connections_)
+ for (auto &conn : module->connections())
sigmap(conn.first).replace(sig, dummy_wire, &conn.first);
}
@@ -123,7 +123,7 @@ struct ConnectPass : public Pass {
SigMap sigmap;
if (!flag_nomap)
- for (auto &it : module->connections_) {
+ for (auto &it : module->connections()) {
std::vector<RTLIL::SigBit> lhs = it.first.to_sigbit_vector();
std::vector<RTLIL::SigBit> rhs = it.first.to_sigbit_vector();
for (size_t i = 0; i < lhs.size(); i++)
@@ -148,7 +148,7 @@ struct ConnectPass : public Pass {
if (!flag_nounset)
unset_drivers(design, module, sigmap, sig_lhs);
- module->connections_.push_back(RTLIL::SigSig(sig_lhs, sig_rhs));
+ module->connect(RTLIL::SigSig(sig_lhs, sig_rhs));
}
else
if (!unset_expr.empty())
@@ -176,7 +176,7 @@ struct ConnectPass : public Pass {
if (!RTLIL::SigSpec::parse_sel(sig, design, module, port_expr))
log_cmd_error("Failed to parse port expression `%s'.\n", port_expr.c_str());
- module->cells.at(RTLIL::escape_id(port_cell))->connections_[RTLIL::escape_id(port_port)] = sigmap(sig);
+ module->cells.at(RTLIL::escape_id(port_cell))->connections()[RTLIL::escape_id(port_port)] = sigmap(sig);
}
else
log_cmd_error("Expected -set, -unset, or -port.\n");