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| author | Clifford Wolf <clifford@clifford.at> | 2014-08-24 13:27:40 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-08-24 13:27:40 +0200 |
| commit | 9c5a63c52c24f0570557b4bf7340b41666cf44b6 (patch) | |
| tree | 7221be2d621e239f36dfcbaab0ef177793c81939 /manual/PRESENTATION_ExSyn/proc_01.v | |
| parent | c642dd0b3eb1390b6c1acd39c1f19797da27b190 (diff) | |
| download | yosys-9c5a63c52c24f0570557b4bf7340b41666cf44b6.tar.gz yosys-9c5a63c52c24f0570557b4bf7340b41666cf44b6.tar.bz2 yosys-9c5a63c52c24f0570557b4bf7340b41666cf44b6.zip | |
azonenberg: Make dump_vcd save model when temporal induction fails due to step limit
Diffstat (limited to 'manual/PRESENTATION_ExSyn/proc_01.v')
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