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| author | Clifford Wolf <clifford@clifford.at> | 2014-09-03 21:20:59 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-09-03 21:20:59 +0200 |
| commit | b9cb483f3e2a498ee75a422e09164a920918362b (patch) | |
| tree | c1375a5e5b70895b2d392bfb308fc75d648a0c19 /kernel | |
| parent | 5733f4a39d56388e531b6c1471f56c3efb023f31 (diff) | |
| download | yosys-b9cb483f3e2a498ee75a422e09164a920918362b.tar.gz yosys-b9cb483f3e2a498ee75a422e09164a920918362b.tar.bz2 yosys-b9cb483f3e2a498ee75a422e09164a920918362b.zip | |
Using $pos models for $bu0
Diffstat (limited to 'kernel')
| -rw-r--r-- | kernel/calc.cc | 2 | ||||
| -rw-r--r-- | kernel/satgen.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/kernel/calc.cc b/kernel/calc.cc index 4048e4a1f..da03f6164 100644 --- a/kernel/calc.cc +++ b/kernel/calc.cc @@ -575,7 +575,7 @@ RTLIL::Const RTLIL::const_pow(const RTLIL::Const &arg1, const RTLIL::Const &arg2 RTLIL::Const RTLIL::const_pos(const RTLIL::Const &arg1, const RTLIL::Const&, bool signed1, bool, int result_len) { RTLIL::Const arg1_ext = arg1; - extend(arg1_ext, result_len, signed1); + extend_u0(arg1_ext, result_len, signed1); return arg1_ext; } diff --git a/kernel/satgen.h b/kernel/satgen.h index c7f1680d4..eed3adaad 100644 --- a/kernel/satgen.h +++ b/kernel/satgen.h @@ -470,7 +470,7 @@ struct SatGen { std::vector<int> undef_a = importUndefSigSpec(cell->getPort("\\A"), timestep); std::vector<int> undef_y = importUndefSigSpec(cell->getPort("\\Y"), timestep); - extendSignalWidthUnary(undef_a, undef_y, cell, cell->type != "$bu0"); + extendSignalWidthUnary(undef_a, undef_y, cell); if (cell->type == "$pos" || cell->type == "$bu0") { ez->assume(ez->vec_eq(undef_a, undef_y)); |