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author | Clifford Wolf <clifford@clifford.at> | 2019-04-21 16:10:41 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2019-04-23 21:36:59 +0200 |
commit | a7e11261bd4e72eb6d33d8c8496225fae36dde85 (patch) | |
tree | 765efcc7a2053ae37d13ab4ee636df564c921010 /kernel | |
parent | b2020ab44fe33b83dbde39fe1f0cd53e4460f2f0 (diff) | |
download | yosys-a7e11261bd4e72eb6d33d8c8496225fae36dde85.tar.gz yosys-a7e11261bd4e72eb6d33d8c8496225fae36dde85.tar.bz2 yosys-a7e11261bd4e72eb6d33d8c8496225fae36dde85.zip |
Add $specify2 and $specify3 cells to simlib
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'kernel')
0 files changed, 0 insertions, 0 deletions