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| author | Clifford Wolf <clifford@clifford.at> | 2013-08-15 11:40:01 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2013-08-15 11:40:01 +0200 |
| commit | 2f3da54f269fac5dab4b03eec80182c534f8c28f (patch) | |
| tree | b2da83064fd40f50b46aa958a55e7415b893214e /kernel | |
| parent | d0e93e04d1cc196264b0bbcf1aafcfba0adb2ea0 (diff) | |
| download | yosys-2f3da54f269fac5dab4b03eec80182c534f8c28f.tar.gz yosys-2f3da54f269fac5dab4b03eec80182c534f8c28f.tar.bz2 yosys-2f3da54f269fac5dab4b03eec80182c534f8c28f.zip | |
Added sat -ignore_div_by_zero switch
Diffstat (limited to 'kernel')
| -rw-r--r-- | kernel/satgen.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/kernel/satgen.h b/kernel/satgen.h index b2f8b15b7..5b4abfc21 100644 --- a/kernel/satgen.h +++ b/kernel/satgen.h @@ -39,9 +39,10 @@ struct SatGen SigMap *sigmap; std::string prefix; SigPool initial_state; + bool ignore_div_by_zero; SatGen(ezSAT *ez, RTLIL::Design *design, SigMap *sigmap, std::string prefix = std::string()) : - ez(ez), design(design), sigmap(sigmap), prefix(prefix) + ez(ez), design(design), sigmap(sigmap), prefix(prefix), ignore_div_by_zero(false) { } @@ -310,6 +311,10 @@ struct SatGen else ez->assume(ez->vec_eq(y, chain_buf)); } + + if (ignore_div_by_zero) + ez->assume(ez->expression(ezSAT::OpOr, b)); + return true; } |