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| author | Clifford Wolf <clifford@clifford.at> | 2016-02-01 10:10:20 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2016-02-01 10:10:20 +0100 |
| commit | 01bcc5663fa7c65ddbb6c55abebcfc60af8d200b (patch) | |
| tree | 2d0dedddcfc0689840be6b021b5251cf53c29e4a /kernel | |
| parent | ea492abcf01ee588a9756f8ae1f632ff418cd30c (diff) | |
| download | yosys-01bcc5663fa7c65ddbb6c55abebcfc60af8d200b.tar.gz yosys-01bcc5663fa7c65ddbb6c55abebcfc60af8d200b.tar.bz2 yosys-01bcc5663fa7c65ddbb6c55abebcfc60af8d200b.zip | |
SigMap performance improvement
Diffstat (limited to 'kernel')
| -rw-r--r-- | kernel/sigtools.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/kernel/sigtools.h b/kernel/sigtools.h index 83ff470d2..4e97bb775 100644 --- a/kernel/sigtools.h +++ b/kernel/sigtools.h @@ -242,7 +242,13 @@ struct SigMap void set(RTLIL::Module *module) { - clear(); + int bitcount = 0; + for (auto &it : module->connections()) + bitcount += it.first.size(); + + database.clear(); + database.reserve(bitcount); + for (auto &it : module->connections()) add(it.first, it.second); } |