diff options
| author | Clifford Wolf <clifford@clifford.at> | 2016-10-14 15:24:03 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2016-10-14 15:24:03 +0200 |
| commit | bdc316db50cd8b68ef096386a89c1b38793784e1 (patch) | |
| tree | 507341053afa28df1a753ef9de33c3d096683720 /kernel/satgen.h | |
| parent | 2733994aeba0879533cc1a871aae84497b32ff9e (diff) | |
| download | yosys-bdc316db50cd8b68ef096386a89c1b38793784e1.tar.gz yosys-bdc316db50cd8b68ef096386a89c1b38793784e1.tar.bz2 yosys-bdc316db50cd8b68ef096386a89c1b38793784e1.zip | |
Added $anyseq cell type
Diffstat (limited to 'kernel/satgen.h')
| -rw-r--r-- | kernel/satgen.h | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/kernel/satgen.h b/kernel/satgen.h index 792bb3ed7..690f8e337 100644 --- a/kernel/satgen.h +++ b/kernel/satgen.h @@ -1332,8 +1332,8 @@ struct SatGen if (model_undef) { - std::vector<int> undef_d = importUndefSigSpec(cell->getPort("\\D"), timestep-1); - std::vector<int> undef_q = importUndefSigSpec(cell->getPort("\\Q"), timestep); + std::vector<int> undef_d = importUndefSigSpec(cell->getPort("\\Y"), timestep-1); + std::vector<int> undef_q = importUndefSigSpec(cell->getPort("\\Y"), timestep); ez->assume(ez->vec_eq(undef_d, undef_q)); undefGating(q, qq, undef_q); @@ -1341,6 +1341,11 @@ struct SatGen return true; } + if (cell->type == "$anyseq") + { + return true; + } + if (cell->type == "$_BUF_" || cell->type == "$equiv") { std::vector<int> a = importDefSigSpec(cell->getPort("\\A"), timestep); |