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author | Clifford Wolf <clifford@clifford.at> | 2015-10-24 22:56:40 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2015-10-24 22:56:40 +0200 |
commit | 7f110e7018d35f29cf6a5d3031400a8044c8d32d (patch) | |
tree | 9c65e6929e43faec716efab17b37bd53f9afa4b3 /kernel/rtlil.cc | |
parent | 6af80769678f260aa4aeaf3b12b54dfdc15fa5dd (diff) | |
download | yosys-7f110e7018d35f29cf6a5d3031400a8044c8d32d.tar.gz yosys-7f110e7018d35f29cf6a5d3031400a8044c8d32d.tar.bz2 yosys-7f110e7018d35f29cf6a5d3031400a8044c8d32d.zip |
renamed SigSpec::to_single_sigbit() to SigSpec::as_bit(), added is_bit()
Diffstat (limited to 'kernel/rtlil.cc')
-rw-r--r-- | kernel/rtlil.cc | 23 |
1 files changed, 11 insertions, 12 deletions
diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index 6f150c1e2..5f056f89c 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -3197,6 +3197,17 @@ RTLIL::SigChunk RTLIL::SigSpec::as_chunk() const return chunks_[0]; } +RTLIL::SigBit RTLIL::SigSpec::as_bit() const +{ + cover("kernel.rtlil.sigspec.as_bit"); + + log_assert(width_ == 1); + if (packed()) + return RTLIL::SigBit(*chunks_.begin()); + else + return bits_[0]; +} + bool RTLIL::SigSpec::match(std::string pattern) const { cover("kernel.rtlil.sigspec.match"); @@ -3284,18 +3295,6 @@ dict<RTLIL::SigBit, RTLIL::SigBit> RTLIL::SigSpec::to_sigbit_dict(const RTLIL::S return new_map; } -RTLIL::SigBit RTLIL::SigSpec::to_single_sigbit() const -{ - cover("kernel.rtlil.sigspec.to_single_sigbit"); - - pack(); - log_assert(width_ == 1); - for (auto &c : chunks_) - if (c.width) - return RTLIL::SigBit(c); - log_abort(); -} - static void sigspec_parse_split(std::vector<std::string> &tokens, const std::string &text, char sep) { size_t start = 0, end = 0; |